Microchip mcp4132 manual

Microchip mcp4132
6.9 · 1
PDF user manual
 · 88 pages
English
user manualMicrochip mcp4132
© 2008 Microchip Technology Inc. DS22060B-page 1

MCP413X/415X/423X/425X

Features

• Single or Dual Resistor Network options
• Potentiometer or Rheostat configuration options
• Resistor Network Resolution
- 7-bit: 128 Resistors (129 Steps)
- 8-bit: 256 Resistors (257 Steps)
•R
AB
Resistances options of:
-5k
-10k
-50k
- 100 k
• Zero Scale to Full-Scale Wiper operation
• Low Wiper Resistance: 75 (typical)
• Low Tempco:
- Absolute (Rheostat): 50 ppm typical
(0°C to 70°C)
- Ratiometric (Potentiometer): 15 ppm typical
• SPI Serial Interface (10 MHz, modes 0,0 & 1,1)
- High-Speed Read/Writes to wiper registers
- SDI/SDO multiplexing (MCP41X1 only)
• Resistor Network Terminal Disconnect Feature
via:
- Shutdown pin (SHDN
)
- Terminal Control (TCON) Register
• Brown-out reset protection (1.5V typical)
• Serial Interface Inactive current (2.5 uA typical)
• High-Voltage Tolerant Digital Inputs: Up to 12.5V
• Supports Split Rail Applications
• Internal weak pull-up on all digital inputs
• Wide Operating Voltage:
- 2.7V to 5.5V - Device Characteristics
Specified
- 1.8V to 5.5V - Device Operation
• Wide Bandwidth (-3 dB) Operation:
- 2 MHz (typical) for 5.0 k device
• Extended temperature range (-40°C to +125°C)

Description

The MCP41XX and MCP42XX devices offer a wide
range of product offerings using an SPI interface. This
family of devices support 7-bit and 8-bit resistor
networks, and Potentiometer and Rheostat pinouts.

Package Types (top view)

1
2
3
4
5
6
7
8
P0W
P0B
P0A
V
SS
V
DD
MCP41X1
Single Potentiometer
PDIP, SOIC, MSOP
CS
SDI/SDO
SCK
1
2
3
4
5
6
7
8
P0B
SDO
P0W
V
DD
MCP41X2
Single Rheostat
PDIP, SOIC, MSOP
1
2
3
4
11
12
13
14
SHDN
SDO
WP
V
DD
MCP42X1 Dual Potentiometers
PDIP, SOIC, TSSOP
5
6
7
8
9
10
P0W
P0B
P0A
P1A
P1W
P1B
V
SS
CS
SDI
SCK
V
SS
CS
SDI
SCK
4x4 QFN*
1
2
3
4
7
8
9
10
SDO
V
DD
MCP42X2 Dual Rheostat
MSOP, DFN
5
6
P0B
P0W
P1W
P1B
V
SS
CS
SDI
SCK
3x3 DFN*
SDI/SDO
SCK
V
SS
P0B
P0W
1
2
3
4
8
7
6
5
P0A
CS
EP
9
3x3 DFN*
SDI
SCK
V
SS
SDO
P0B
1
2
3
4
8
7
6
5
P0W
V
DD
CS
EP
9
V
DD
3x3 DFN*
SDI
SCK
V
SS
SDO
P0B
1
2
3
4
10
9
8
7
P0W
CS
EP
11
V
DD
5
6
P1B
P1W
* Includes Exposed Thermal Pad (EP); see Table 3-1.
2
V
SS
V
SS
SCK
WP
NC
P1B
P0B
P1W
P1A
P0A
P0W
CS
V
DD
SDO
SHDN
SDI
EP
16
1
15 14 13
3
4
12
11
10
9
5678
17

7/8-Bit Single/Dual SPI Digital POT with Volatile Memory

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